An upcoming Linux kernel patch allows the SFENCE instruction in write reminiscence obstacles on older processors with SSE however with out SSE2, doubtlessly bettering efficiency on affected methods.
A minor optimisation is being added to the Linux kernel for older processors that help Streaming SIMD Extensions (SSE) however lack SSE2. The affected methods embody AMD Athlon XP processors, some early Sempron fashions, and sure Intel Celeron and Pentium III processors.
The patch is said to the write reminiscence barrier (WMB) which presently makes use of SFENCE instruction. The patch addresses a constraint within the present kernel code that restricts using SFENCE to processors with SSE2 functionality, though SFENCE was launched with the unique SSE instruction set.
Open-source developer Yao Zi recognized the difficulty. The correction modifications the processor characteristic requirement utilized by the wmb() perform from SSE2 to SSE, permitting SFENCE for use on processors with out SSE2 help. This ensures that the suitable reminiscence barrier operation can be utilized on these processors.
The patch has been picked up into the tip/tip.git x86/core department and is anticipated to be merged throughout the Linux 7.3 improvement cycle. It has additionally been earmarked for back-porting into older steady Linux kernel strains. No efficiency measurements have been carried out on the affected processors, so the potential efficiency enchancment stays unmeasured.
